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Pause Technology
Commemorate Banana Union Day

In 2001-10, a patent company called Pause Technologies started suing digital television companies based on claims to the idea of buffering digital data in order to allow the user to stop or retard a transmission and catch up later. We have not yet ascertained the status of the US patent RE36801 or its possible European counterparts. Below are some guesses and links.
->Pause Technology Inc's account of the situation
->http://www.gotuit.com/patents/re36801.pdf
->Patent Description
->Pause Technology Inc announces lawsuit to its investors
->Heise-Nachricht
->discussion
It seems that there's a company named Pause Technologies which patented in 1992 the ability to pause live TV, play a portion of it, and then skip ahead to live TV. ... It seems like the only reason for the existance of Pause Technologies is to buy up patents from those who didn't develop them and then sue those who come up with the same idea and build it!
USRE36801:
Time delayed digital video system using concurrent recording and playback
Inventor(s):
Logan; James, Windham, NH 03087 Goessling; Daniel, Wayland, MA
Applicant/Assignee:
Logan; James, Windham, NH
Issued/Filed Dates:
Aug. 1, 2000 / April 18, 1996
Application Number:
US1996000634618
Priority Number(s):
April 18, 1996 US1996000634618
Oct. 29, 1992 US1992000968439
First Claim:
In combination,
means for generating a substantially continuous sequence of a digital television input signal values representing an incoming audio or video program signal,
a source of control commands,
a television program signal utilization device, and a variable delay circular storage buffer for storing those of said digital input signal values which were received during the immediately preceding time intervals of predetermined duration, said circular storage buffer having an input port connected to receive said digital television input signal values and an output port connected to supply a delayed replica of said input signal values to said utilization device following a variable delay interval, the duration of said interval being selectable in response to said control commands, said circular storage buffer comprising, in combination:
an addressable digital memory,
a programmed processor,
memory access means for continuously writing said sequence of digital television input signal values into said addressable digital memory, at a sequence of continually advancing writing addresses established by said processor to write over the oldest of said input signal values recorded in said digital memory as said sequence of writing addresses are advanced so that said digital input signal values received during said immediately preceding time interval of predetermined duration are stored in said addressable digital memory, and for concurrently reproducing and supplying to said output port an output sequence of previously written ones of signal values read from said addressable digital memory at a sequence of different reading addresses established by said processor, and means for supplying said output sequence to said output port, wherein said programmed processor includes means responsive to said control commands for varying the relative locations of said reading and writing addresses to selectively alter said variable delay interval.
unsuccessful search at http://de.espacenet.com/ on 2001-11-05 using title and inventors Logan and Goessling
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english version 2004/08/16 by Hartmut PILCH